3 research outputs found

    Crypto Embedded System for Electronic Document

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    In this paper, a development of low-cost RSA-based Crypto Embedded System targeted for electronic document security is presented. The RSA algorithm is implemented in a re-configurable hardware, in this case Field Programmable Gate Array (FPGA). The 32-bit soft cores of AlteraÂ’s Nios RISC processor is used as the basic building blocks of the proposed complete embedded solutions. AlteraÂ’s SOPC Builder is used to facilitate the development of crypto embedded system, particularly in hardware/software integration stage. The use of Cryptographic Application Programming Interface (CAPI) to bridge the application and the hardware, and the associated communication layer in the embedded system is also discussed. The result obtained shows that the crypto embedded system provides a suitable compromise between the constraints of speed, space and required security level based on the specific demands of targeted applications

    A true random number generator for crypto embedded systems

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    In this paper, we design a true random number generator (TRNG) in hardware which is targeted for FPGA-based crypto embedded systems. All crypto protocols require the generation and use of secret values that must be unknown to attackers. Random number generators (RNG) are required to generate public/private key pairs for asymmetric algorithm such as RSA and symmetric algorithm such as AES. Since security protocols rely on the unpredictability of the keys they use, RNGs for crypto applications must meet stringent requirements. The most important in cryptography is that attackers must not be able to make any useful predictions about the RNG outputs. The TRNG employs internal analog phase-locked loop (PLL) circuitry to generate a noise which is useful in producing random output. In contrast with traditionally used free running oscillators, it uses a novel method of random noise extraction based on two rationally related synthesized clock signals. The digital design is extremely compact and can be implemented on any advance FPGA device equipped with analog PLL. With the help of this TRNG, the cryptographic implementations such as key generation, authentication protocols, digital signature schemes and even in some encryption algorithm can be secure enough from being abused by malicious act
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